%FILENAME%
vtr-9.0.0-1-x86_64.pkg.tar.zst

%NAME%
vtr

%BASE%
vtr

%VERSION%
9.0.0-1

%DESC%
Verilog to Routing -- Open Source CAD Flow for FPGA Research

%CSIZE%
7695515

%ISIZE%
26121924

%SHA256SUM%
75a15f72968861eaebf73fc37b94c7aabde369ffa18b866f4bc59e80d3440504

%PGPSIG%
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%URL%
https://verilogtorouting.org

%LICENSE%
MIT

%ARCH%
x86_64

%BUILDDATE%
1749924375

%PACKAGER%
Antonio Rojas <arojas@archlinux.org>

%DEPENDS%
ctags
tbb

%MAKEDEPENDS%
cmake
wget

